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H8SX/1663M bảng dữ liệu(PDF) 641 Page - Renesas Technology Corp |
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H8SX/1663M bảng dữ liệu(HTML) 641 Page - Renesas Technology Corp |
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641 / 1504 page ![]() Section 13 I/O Ports Rev. 2.00 Sep. 24, 2008 Page 609 of 1468 REJ09B0412-0200 13.2 Output Buffer Control This section describes the output priority of each pin. The name of each peripheral module pin is followed by "_OE". This (for example: TIOCA4_OE) indicates whether the output of the corresponding function is valid (1) or if another setting is specified (0). Table 13.5 lists each port output signal's valid setting. For details on the corresponding output signals, see the register description of each peripheral module. If the name of each peripheral module pin is followed by A or B, the pin function can be modified by the port function control register (PFCR). For details, see section 13.3, Port Function Controller. For a pin whose initial value changes according to the activation mode, "initial value E" indicates the initial value when the LSI is started up in external extended mode and "initial value S" indicates the initial value when the LSI is started in single-chip mode. 13.2.1 Port 1 (1) P17/ IRQ7-A/TCLKD-B/SCL0/EDRAK1 /ADTRG1 The pin function is switched as shown below according to the combination of the EXDMAC and IIC2 register settings and P17DDR bit setting. Setting EXDMAC IIC2 I/O Port Module Name Pin Function EDRAK1_OE SCL0_OE P17DDR EXDMAC EDRAK1 output 1 IIC2 SCL0 input/output 0 1 I/O port P17 output 0 0 1 P17 input (initial value) 0 0 0 |
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