H8SXSLASH1663R datasheet(162/1504 Pages) RENESAS

tên linh kiện	H8SX/1663R

Giải thích chi tiết về linh kiện	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

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Section 7 Interrupt Controller

Rev. 2.00 Sep. 24, 2008 Page 130 of 1468

REJ09B0412-0200

A block diagram of the interrupt controller is shown in figure 7.1.

INTCR

TM32K

LVD*

IPR

NMI input

IRQ11 to 0 input

IRQ15 input

Internal interrupt

sources

WOVI to RESUME

INTM1, INTM0

NMIEG

NMI input unit

IRQ input unit

CPU priority

DTC priority

Interrupt controller

Priority

determination

Source selector

CPU

interrupt request

DMAC

activation

permission

CPU

vector

DTC vector

Activation

request

clear signal

DTC

activation

request

I2 to I0

CCR

EXR

DMDR

CPU

DMAC

DMAC priority

control

DTC

ISCR

SSIER

IER

DTCER

CPUPCR

DTC priority

control

DTCCR

ISR

INTCR:

CPUPCR:

ISCR:

IER:

ISR:

Interrupt control register

CPU priority control register

IRQ sense control register

IRQ enable register

IRQ status register

SSIER:

IPR:

DTCER:

DTCCR:

Software standby release IRQ enable register

Interrupt priority register

DTC enable register

DTC control register

[Legend]

IRQ14 input

Note: * Supported only by the H8SX/1668M Group.

Figure 7.1 Block Diagram of Interrupt Controller

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