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H8SX1663 bảng dữ liệu(PDF) 332 Page - Renesas Technology Corp

tên linh kiện H8SX1663
Giải thích chi tiết về linh kiện  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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Section 6 Bus Controller (BSC)
Rev.1.00 Jun. 07, 2006 Page 280 of 1102
REJ09B0294-0100
Some DRAMs with the self-refresh mode have a given time between cancellation of the self-
refresh mode and the subsequent command issued cycle. From one to seven of precharge cycles
immediately after cancellation of the self-refresh mode can be inserted. Normal precharge is also
performed according to bits TPC1 and TPC0 in DRACCR. Set the precharge time including the
normal precharge so that the precharge time immediately after a self-refresh cycle is optimal.
Figure 6.80 shows a timing example when one precharge cycle is added.
T
r
TR
p1
TR
c2
TR
c3
T
c1
T
c2
T
p
Address bus
Software
standby
SDRAM space write
Data bus
SD
φ
CS
Precharge-sel
RAS
CAS
WE
PALL
ACTV
WRITE
NOP
NOP
DQMUU, DQMUL
DQMLU, DQMLL
CKE
BS
RD/
WR
Figure 6.80 Timing Example when 1 Precharge Cycle Added
(TPC2 to TPC0 = H'1, TPC1 = 0, TPC0 = 0)



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