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HD64F2144AV bảng dữ liệu(PDF) 49 Page - Renesas Technology Corp |
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HD64F2144AV bảng dữ liệu(HTML) 49 Page - Renesas Technology Corp |
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49 / 1177 page ![]() Section 1 Overview Rev. 4.00 Sep 27, 2006 page 5 of 1130 REJ09B0327-0400 Item Specifications D/A converter • Resolution: 8 bits • Output: 2 channels I/O ports • 74 input/output pins (including 24 with LED drive capability) • 8 input-only pins • VCCB (separate power supply) drive pins among I/O pins (H8S/2148 Group and H8S/2147N) Memory • Flash memory or mask ROM • High-speed static RAM Product Name ROM RAM H8S/2144, H8S/2148 128 kbytes 4 kbytes H8S/2143 96 kbytes 4 kbytes H8S/2142, H8S/2147, H8S/2147N 64 kbytes 2 kbytes Interrupt controller • Nine external interrupt pins (NMI, IRQ0 to IRQ7) • 44 internal interrupt sources • Three priority levels settable Power-down state • Medium-speed mode • Sleep mode • Module stop mode • Software standby mode • Hardware standby mode • Subclock operation Clock pulse generator • Built-in duty correction circuit Packages • 100-pin plastic QFP (FP-100B) • 100-pin plastic TQFP (TFP-100B) I 2C bus interface (IIC: 2 channels) (option in H8S/2148 Group and H8S/2147N) • Conforms to Philips I2C bus interface standard • Single master mode/slave mode • Arbitration lost condition can be identified • Supports two slave addresses |
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