HD6432351 datasheet(659/1025 Pages) RENESAS

659 / 1025 page

Section 14 Smart Card Interface

Rev. 3.00 Sep 15, 2006 page 625 of 988

REJ09B0330-0300

Smart Card Mode Register (SCMR) Setting

The SDIR bit is cleared to 0 if the IC card is of the direct convention type, and set to 1 if of the

inverse convention type.

The SINV bit is cleared to 0 if the IC card is of the direct convention type, and set to 1 if of the

inverse convention type.

The SMIF bit is set to 1 in the case of the Smart Card interface.

Examples of register settings and the waveform of the start character are shown below for the two

types of IC card (direct convention and inverse convention).

• Direct convention (SDIR = SINV = O/E = 0)

ZAZ

(Z)

State

With the direct convention type, the logic 1 level corresponds to state Z and the logic 0 level to

state A, and transfer is performed in LSB-first order. The start character data above is H'3B.

The parity bit is 1 since even parity is stipulated for the Smart Card.

• Inverse convention (SDIR = SINV = O/E = 1)

AAAAAA

(Z)

State

With the inverse convention type, the logic 1 level corresponds to state A and the logic 0 level

to state Z, and transfer is performed in MSB-first order. The start character data above is H'3F.

The parity bit is 0, corresponding to state Z, since even parity is stipulated for the Smart Card.

With the H8S/2350 Group, inversion specified by the SINV bit applies only to the data bits,

D7 to D0. For parity bit inversion, the O/

E bit in SMR is set to odd parity mode (the same

applies to both transmission and reception).

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