HD6432351 datasheet(590/1025 Pages) RENESAS

tên linh kiện	HD6432351

Giải thích chi tiết về linh kiện	16-Bit Single-Chip Microcomputer

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Section 13 Serial Communication Interface (SCI)

Rev. 3.00 Sep 15, 2006 page 556 of 988

REJ09B0330-0300

Bit 5—Transmit Enable (TE): Enables or disables the start of serial transmission by the SCI.

Bit 5

Description

Transmission disabled*

(Initial value)

Transmission enabled*

Notes: 1. The TDRE flag in SSR is fixed at 1.

2. In this state, serial transmission is started when transmit data is written to TDR and the

TDRE flag in SSR is cleared to 0.

SMR setting must be performed to decide the transfer format before setting the TE bit

to 1.

Bit 4—Receive Enable (RE): Enables or disables the start of serial reception by the SCI.

Bit 4

Description

Reception disabled*

(Initial value)

Reception enabled*

Notes: 1. Clearing the RE bit to 0 does not affect the RDRF, FER, PER, and ORER flags, which

retain their states.

2. Serial reception is started in this state when a start bit is detected in asynchronous

mode or serial clock input is detected in clocked synchronous mode.

SMR setting must be performed to decide the transfer format before setting the RE bit

to 1.

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