HD6432351 datasheet(573/1025 Pages) RENESAS

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Section 12 Watchdog Timer (WDT)

Rev. 3.00 Sep 15, 2006 page 539 of 988

REJ09B0330-0300

Writing to RSTCSR

RSTCSR must be written to by word transfer instruction to address H'FFBE. It cannot be written

to with byte instructions.

Figure 12.3 shows the format of data written to RSTCSR. The method of writing 0 to the WOVF

bit differs from that for writing to the RSTE and RSTS bits.

To write 0 to the WOVF bit, the write data must have H'A5 in the upper byte and H'00 in the

lower byte. This clears the WOVF bit to 0, but has no effect on the RSTE and RSTS bits. To write

to the RSTE and RSTS bits, the upper byte must contain H'5A and the lower byte must contain the

write data. This writes the values in bits 6 and 5 of the lower byte into the RSTE and RSTS bits,

but has no effect on the WOVF bit.

H'A5

H'00

8 7

H'5A

Write data

8 7

Writing 0 to WOVF bit

Writing to RSTE and RSTS bits

Address: H'FFBE

Figure 12.3 Format of Data Written to RSTCSR

Reading TCNT, TCSR, and RSTCSR

These registers are read in the same way as other registers. The read addresses are H'FFBC for

TCSR, H'FFBD for TCNT, and H'FFBF for RSTCSR.

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