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HD6432351 bảng dữ liệu(PDF) 554 Page - Renesas Technology Corp

tên linh kiện HD6432351
Giải thích chi tiết về linh kiện  16-Bit Single-Chip Microcomputer
PDF  1025 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
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HD6432351 bảng dữ liệu(HTML) 554 Page - Renesas Technology Corp

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Section 11 Programmable Pulse Generator (PPG)
Rev. 3.00 Sep 15, 2006 page 520 of 988
REJ09B0330-0300
11.3
Operation
11.3.1
Overview
PPG pulse output is enabled when the corresponding bits in P1DDR, P2DDR, and NDER are set
to 1. In this state the corresponding PODR contents are output.
When the compare match event specified by PCR occurs, the corresponding NDR bit contents are
transferred to PODR to update the output values.
Figure 11.2 illustrates the PPG output operation and table 11.3 summarizes the PPG operating
conditions.
Output trigger signal
Pulse output pin
Internal data bus
Normal output/
inverted output
C
PODR
QD
NDER
Q
NDR
QD
DDR
Q
Figure 11.2 PPG Output Operation
Table 11.3 PPG Operating Conditions
NDER
DDR
Pin Function
0
0
Generic input port
1
Generic output port
1
0
Generic input port (but the PODR bit is a read-only bit, and when
compare match occurs, the NDR bit value is transferred to the PODR bit)
1
PPG pulse output
Sequential output of data of up to 16 bits is possible by writing new output data to NDR before
the next compare match. For details of non-overlapping operation, see section 11.3.4, Non-
Overlapping Pulse Output.



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