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HD6432351 bảng dữ liệu(PDF) 516 Page - Renesas Technology Corp |
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HD6432351 bảng dữ liệu(HTML) 516 Page - Renesas Technology Corp |
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516 / 1025 page ![]() Section 10 16-Bit Timer Pulse Unit (TPU) Rev. 3.00 Sep 15, 2006 page 482 of 988 REJ09B0330-0300 10.5 Interrupts 10.5.1 Interrupt Sources and Priorities There are three kinds of TPU interrupt source: TGR input capture/compare match, TCNT overflow, and TCNT underflow. Each interrupt source has its own status flag and enable/disabled bit, allowing generation of interrupt request signals to be enabled or disabled individually. When an interrupt request is generated, the corresponding status flag in TSR is set to 1. If the corresponding enable/disable bit in TIER is set to 1 at this time, an interrupt is requested. The interrupt request is cleared by clearing the status flag to 0. Relative channel priorities can be changed by the interrupt controller, but the priority order within a channel is fixed. For details, see section 5, Interrupt Controller. Table 10.13 lists the TPU interrupt sources. |
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