HD6432351 datasheet(447/1025 Pages) RENESAS

447 / 1025 page

Section 10 16-Bit Timer Pulse Unit (TPU)

Rev. 3.00 Sep 15, 2006 page 413 of 988

REJ09B0330-0300

Table 10.1 TPU Functions

Item

Channel 0 Channel 1 Channel 2 Channel 3 Channel 4 Channel 5

Count clock

φ/1

φ/4

φ/16

φ/64

TCLKA

TCLKB

TCLKC

TCLKD

φ/1

φ/4

φ/16

φ/64

φ/256

TCLKA

TCLKB

φ/1

φ/4

φ/16

φ/64

φ/1024

TCLKA

TCLKB

TCLKC

φ/1

φ/4

φ/16

φ/64

φ/256

φ/1024

φ/4096

TCLKA

φ/1

φ/4

φ/16

φ/64

φ/1024

TCLKA

TCLKC

φ/1

φ/4

φ/16

φ/64

φ/256

TCLKA

TCLKC

TCLKD

General registers

TGR0A

TGR0B

TGR1A

TGR1B

TGR2A

TGR2B

TGR3A

TGR3B

TGR4A

TGR4B

TGR5A

TGR5B

General registers/

buffer registers

TGR0C

TGR0D

—

TGR3C

TGR3D

—

I/O pins

TIOCA0

TIOCB0

TIOCC0

TIOCD0

TIOCA1

TIOCB1

TIOCA2

TIOCB2

TIOCA3

TIOCB3

TIOCC3

TIOCD3

TIOCA4

TIOCB4

TIOCA5

TIOCB5

Counter clear

function

TGR

compare

match or

input

capture

TGR

compare

match or

input

capture

TGR

compare

match or

input

capture

TGR

compare

match or

input

capture

TGR

compare

match or

input

capture

TGR

compare

match or

input

capture

0 output

1 output

Compare

match

output

Toggle

output

Input capture

function

Synchronous

operation

PWM mode

Phase counting

mode

—

Buffer operation

—

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