HD6432351 datasheet(371/1025 Pages) RENESAS

371 / 1025 page

Section 9 I/O Ports

Rev. 3.00 Sep 15, 2006 page 337 of 988

REJ09B0330-0300

Selection Method and Pin Functions

P12/PO10/TIOCC0/

TCLKA

The pin function is switched as shown below according to the combination of

the TPU channel 0 setting by bits MD3 to MD0 in TMDR0, bits IOC3 to IOC0 in

TIOR0L, bits CCLR2 to CCLR0 in TCR0, bits TPSC2 to TPSC0 in TCR0 to

TCR5, bit NDER10 in NDERH, and bit P12DDR.

TPU Channel

0 Setting

Table Below (1)

Table Below (2)

P12DDR

—

NDER10

—

Pin function

TIOCC0 output

P12

input

P12

output

PO10

output

TIOCC0 input*

TCLKA input*

Notes: 1. TIOCC0 input when MD3 to MD0 = B'0000, and IOC3 to IOC0 =

B'10xx.

2. TCLKA input when the setting for TCR0 to TCR5 is: TPSC2 to

TPSC0 = B'100;

TCLKA input when channels 1 and 5 are set to phase counting

mode.

TPU Channel

0 Setting

(2)

(1)

(2)

(1)

(2)

MD3 to MD0

B'0000

B'001x

B'0010

B'0011

IOC3 to IOC0

B'0000

B'0100

B'1xxx

B'0001 to

B'0011

B'0101 to

B'0111

B'xx00

Other than B'xx00

CCLR2 to

CCLR0

—

Other

than

B'101

Output

function

—

Output

compare

output

—

PWM

mode 1

output*

PWM

mode 2

output

—

Legend: x: Don’t care

Note:

3. TIOCD0 output is disabled.

When BFA = 1 or BFB = 1 in TMDR0, output is disabled and

setting (2) applies.

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