H838532H datasheet(114/508 Pages) RENESAS

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Section 4 Clock Pulse Generators

Rev. 1.00 May 30, 2008 Page 94 of 484

REJ09B0436-0100

(1) Oscillation Stabilization Time (t

rc)

The time from the point at which the system clock oscillator oscillation waveform starts to change

when an interrupt is generated, until the amplitude of the oscillation waveform increases and the

oscillation frequency stabilizes.

(2) Wait Time

The time required for the CPU and peripheral functions to begin operating after the oscillation

waveform frequency and system clock have stabilized.

The wait time setting is selected with standby timer select bits 2 to 0 (STS2 to STS0) (bits 6 to 4 in

system control register 1 (SYSCR1)).

Oscillation

waveform

(OSC2)

System clock

(

φ)

Oscillation

stabilization

time

Operating

mode

Standby mode,

watch mode,

or subactive

mode

Wait time

Oscillation stabilization wait time

Active (high-speed) mode or

active (medium-speed) mode

Interrupt accepted

Figure 4.12 Oscillation Stabilization Wait Time

When standby mode, watch mode, or subactive mode is cleared by an interrupt or reset, and a

transition is made to active (high-speed/medium-speed) mode, the oscillation waveform begins to

change at the point at which the interrupt is accepted. Therefore, when an oscillator element is

connected in standby mode, watch mode, or subactive mode, since the system clock oscillator is

halted, the time from the point at which this oscillation waveform starts to change until the

amplitude of the oscillation waveform increases and the oscillation frequency stabilizes—that is,

the oscillation stabilization time—is required.

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