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H838532H bảng dữ liệu(PDF) 374 Page - Renesas Technology Corp |
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H838532H bảng dữ liệu(HTML) 374 Page - Renesas Technology Corp |
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374 / 508 page ![]() Section 12 A/D Converter Rev. 1.00 May 30, 2008 Page 354 of 484 REJ09B0436-0100 Bits 3 to 0: Channel select (CH3 to CH0) Bits 3 to 0 select the analog input channel. The channel selection should be made while bit ADSF is cleared to 0. Bit 3 CH3 Bit 2 CH2 Bit 1 CH1 Bit 0 CH0 Analog Input Channel 0 0 * * No channel selected (initial value) 0 1 0 0 AN0 0 1 0 1 AN1 0 1 1 0 AN2 0 1 1 1 AN3 1 0 0 0 AN4 1 0 0 1 AN5 1 0 1 0 AN6 1 0 1 1 AN7 1 1 * * Setting prohibited Note: * Don’t care 12.2.3 A/D Start Register (ADSR) Bit Initial value Read/Write 7 ADSF 0 R/W 6 — 1 — 5 — 1 — 4 — 1 — 3 — 1 — 0 — 1 — 2 — 1 — 1 — 1 — The A/D start register (ADSR) is an 8-bit read/write register for starting and stopping A/D conversion. A/D conversion is started by writing 1 to the A/D start flag (ADSF) or by input of the designated edge of the external trigger signal, which also sets ADSF to 1. When conversion is complete, the converted data is set in ADRRH and ADRRL, and at the same time ADSF is cleared to 0. |
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