H838532H datasheet(342/508 Pages) RENESAS

342 / 508 page

Section 10 Serial Communication Interface

Rev. 1.00 May 30, 2008 Page 322 of 484

REJ09B0436-0100

SCI3 operates as follows when transmitting data.

SCI3 monitors bit TDRE in SSR, and when it is cleared to 0, recognizes that data has been written

to TDR and transfers data from TDR to TSR. It then sets bit TDRE to 1 and starts transmitting. If

bit TIE in SCR3 is set to 1 at this time, a TXI request is made.

Serial data is transmitted from the TXD3x pin using the relevant data transfer format in table

10.11. When the stop bit is sent, SCI3 checks bit TDRE. If bit TDRE is cleared to 0, SCI3

transfers data from TDR to TSR, and when the stop bit has been sent, starts transmission of the

next frame. If bit TDRE is set to 1, bit TEND in SSR bit is set to 1the mark state, in which 1s are

transmitted, is established after the stop bit has been sent. If bit TEIE in SCR3 is set to 1 at this

time, a TEI request is made.

Figure 10.12 shows an example of the operation when transmitting in asynchronous mode.

1 frame

Start

bit

Start

bit

Transmit

data

Transmit

data

Parity

bit

Stop

bit

Parity

bit

Stop

bit

Mark

state

1 frame

0/1

Serial

data

TDRE

TEND

LSI

operation

TXI request

TDRE

cleared to 0

User

processing

Data written

to TDR

TXI request

TEI request

Figure 10.7 Example of Operation when Transmitting in Asynchronous Mode

(8-bit data, parity, 1 stop bit)

H838532H bảng dữ liệu(PDF) 342 Page - Renesas Technology Corp

H838532H bảng dữ liệu(HTML) 342 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL