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38K2 bảng dữ liệu(PDF) 34 Page - Renesas Technology Corp |
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38K2 bảng dữ liệu(HTML) 34 Page - Renesas Technology Corp |
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34 / 358 page ![]() FUNCTIONAL DESCRIPTION Rev.2.00 Oct 15, 2006 page 15 of 130 38K2 Group REJ09B0338-0200 HARDWARE Fig. 11 Port block diagram (2) EXDreq output Serial I/O input EXDack Serial I/O enable bit EXTC Serial I/O synchronous clock selection bit EXA1 CNTR0 interrupt input Pulse output mode INT0 (P50), INT1 (P52) interrupt input VCCE VCCE VCCE VCCE SRDY output enable bit (7) Port P40 Direction register Direction register Direction register Direction register Port latch Port latch Port latch Port latch Port latch Port latch Port latch Port latch Direction register Direction register Direction register Direction register Data bus Data bus Data bus Data bus Data bus Data bus Data bus Data bus Serial I/O output (8) Port P41 (9) Port P42 (10) Port P43 (11) Ports P50, P52 (12) Port P51 (13) Ports P53–P57 (14) Port P6 Serial I/O enable bit Serial I/O enable bit Serial I/O enable bit External bus interface enable bit External bus interface enable bit External bus interface enable bit External bus interface enable bit External bus interface enable bit External bus interface enable bit External bus interface enable bit Receive enable bit Receive enable bit Pull-up control bit Serial I/O mode selection bit Serial I/O mode selection bit Timer output Serial I/O synchronous clock selection bit Serial I/O output Serial I/O external clock input Serial I/O clock output Serial I/O enable bit |
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