AFE5804 datasheet(49/60 Pages) TI

49 / 60 page

ANALOG-TO-DIGITAL CONVERSION

AFE5804

www.ti.com ................................................................................................................................................ SBOS442A – JUNE 2008 – REVISED SEPTEMBER 2008

REFB

are

2.5V

and

0.5V,

respectively.

The

references are internally scaled down differentially by

The analog-to-digital converter (ADC) of the AFE5804

a factor of 2. VCM (the common-mode voltage of

employs

pipelined

converter

architecture

that

REFT and REFB) is also made available externally

consists of a combination of multi-bit and single-bit

through a pin, and is nominally 1.5V.

internal stages. Each stage feeds its data into the

digital

error

correction

logic,

ensuring

excellent

The ADC output goes to a serializer that operates

differential linearity and no missing codes at the

from a 12x clock generated by the PLL. The 12 data

12-bit level.

bits from each channel are serialized and sent LSB

first. In addition to serializing the data, the serializer

The 12 bits given out by each channel are serialized

also generates a 1x clock and a 6x clock. These

and sent out on a single pair of pins in LVDS format.

clocks are generated in the same way the serialized

All eight channels of the AFE5804 operate from a

data are generated, so these clocks maintain perfect

common input clock (CLKP/M). The sampling clocks

synchronization with the data. The data and clock

for each of the eight channels are generated from the

outputs of the serializer are buffered externally using

input clock using a carefully matched clock buffer

LVDS buffers. Using LVDS buffers to transmit data

tree. The 12x clock required for the serializer is

externally has multiple advantages, such as a

generated

internally

from

CLKP/M

using

reduced number of output pins (saving routing space

phase-locked loop (PLL). A 6x and a 1x clock are

on the board), reduced power consumption, and

also output in LVDS format, along with the data, to

reduced effects of digital noise coupling to the analog

enable easy data capture. The AFE5804 operates

circuit inside the AFE5804.

from internally-generated reference voltages that are

trimmed

improve

the

gain

matching

across

devices, and provide the option to operate the

devices without having to externally drive and route

reference lines. The nominal values of REFT and

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