SH7211 datasheet(73/1228 Pages) RENESAS

73 / 1228 page

Section 2 CPU

Rev. 2.00 May. 08, 2008 Page 49 of 1200

REJ09B0344-0200

2.4.6

Branch Instructions

Table 2.15

Branch Instructions

Compatibility

Instruction

Instruction Code

Operation

Execu-

tion

Cycles

T Bit

SH2,

SH2E

SH4

SH-2A

label

10001011dddddddd

When T = 0, disp

× 2 + PC →

PC,

When T = 1, nop

3/1*

⎯

Yes

BF/S

label

10001111dddddddd

Delayed branch

When T = 0, disp

× 2 + PC →

PC,

When T = 1, nop

2/1*

⎯

Yes

label

10001001dddddddd

When T = 1, disp

× 2 + PC →

PC,

When T = 0, nop

3/1*

⎯

Yes

BT/S

label

10001101dddddddd

Delayed branch

When T = 1, disp

× 2 + PC →

PC,

When T = 0, nop

2/1*

⎯

Yes

BRA

label

1010dddddddddddd

Delayed branch,

disp

× 2 + PC → PC

⎯

Yes

BRAF

0000mmmm00100011

Delayed branch,

Rm + PC

→ PC

⎯

Yes

BSR

label

1011dddddddddddd

Delayed branch, PC

→ PR,

disp

× 2 + PC → PC

⎯

Yes

BSRF

0000mmmm00000011

Delayed branch, PC

→ PR,

Rm + PC

→ PC

⎯

Yes

JMP

@Rm

0100mmmm00101011

Delayed branch, Rm

→ PC

⎯

Yes

JSR

@Rm

0100mmmm00001011

Delayed branch, PC

→ PR,

→ PC

⎯

Yes

JSR/N

@Rm

0100mmmm01001011

PC-2

→ PR, Rm → PC

⎯

Yes

JSR/N

@@(disp8,TBR)

10000011dddddddd

PC-2

→ PR,

(disp

× 4 + TBR) → PC

⎯

Yes

RTS

0000000000001011

Delayed branch, PR

→ PC

⎯

Yes

RTS/N

0000000001101011

→ PC

⎯

Yes

RTV/N

0000mmmm01111011

→ R0, PR → PC

⎯

Yes

Note:

One cycle when the program does not branch.

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