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R8C2K bảng dữ liệu(PDF) 246 Page - Renesas Technology Corp |
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R8C2K bảng dữ liệu(HTML) 246 Page - Renesas Technology Corp |
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246 / 471 page ![]() R8C/2K Group, R8C/2L Group 16. Timers Rev.1.10 Dec 21, 2007 Page 229 of 450 REJ09B0406-0110 Figure 16.70 Registers TRDSTR and TRDMR in Input Capture Function Timer RD Start Register (1) Symbol Address After Reset TRDSTR 0137h 11111100b Bit Symbol Bit Name Function RW NOTE: 1. RW TSTART1 RW TRD1 count start flag 0 : Count stops 1 : Count starts TRD0 count start flag 0 : Count stops 1 : Count starts — (b7-b4) CSEL0 11 TSTART0 b7 b6 b5 b4 Set to 1 in the input capture function. TRD1 count operation select bit Set to 1 in the input capture function. Set the TRDSTR register using the MOV instruction (do not use the bit handling instruction). Refer to 16.4.12.1 TRDSTR Register of Notes on Tim er RD. RW RW Nothing is assigned. If necessary, set to 0. When read, the content is 1. — TRD0 count operation select bit b3 b2 CSEL1 b1 b0 Timer RD Mode Register Symbol Address After Reset TRDMR 0138h 00001110b Bit Symbol Bit Name Function RW RW BFC1 BFD1 TRDGRD1 register function select bit 0 : General register 1 : Buffer register of TRDGRB1 register TRDGRC0 register function select bit 0 : General register 1 : Buffer register of TRDGRA0 register BFC0 RW RW TRDGRD0 register function select bit 0 : General register 1 : Buffer register of TRDGRB0 register TRDGRC1 register function select bit 0 : General register 1 : Buffer register of TRDGRA1 register RW RW — (b3-b1) — Timer RD synchronous bit 0 : Registers TRD0 and TRD1 operate independently 1 : Registers TRD0 and TRD1 operate synchronously Nothing is assigned. If necessary, set to 0. When read, the content is 1. b7 b6 b5 b4 b3 b2 BFD0 b1 b0 SYNC |
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