R8C2K datasheet(239/471 Pages) RENESAS

239 / 471 page

R8C/2K Group, R8C/2L Group

16. Timers

Rev.1.10

Dec 21, 2007

Page 222 of 450

REJ09B0406-0110

16.4.2

Buffer Operation

The TRDGRCi (i = 0 or 1) register can be used as the buffer register of the TRDGRAi register, and the

TRDGRDi register can be used as the buffer register of the TRDGRBi register by means of bits BFCi and BFDi

in the TRDMR register.

• TRDGRAi buffer register: TRDGRCi register

• TRDGRBi buffer register: TRDGRDi register

Buffer operation depends on the mode. Table 16.36 lists the Buffer Operation in Each Mode.

i = 0 or 1

Figure 16.65

Buffer Operation in Input Capture Function

Table 16.36

Buffer Operation in Each Mode

Function and Mode

Transfer Timing

Transfer Register

Input capture function

Input capture signal input

Transfer content in TRDGRAi

(TRDGRBi) register to buffer register

Output compare function

Compare match with TRDi register

and TRDGRAi (TRDGRBi) register

Transfer content in buffer register to

TRDGRAi (TRDGRBi) register

PWM mode

Reset synchronous PWM

mode

Compare match withTRD0 register

and TRDGRA0 register

Transfer content in buffer register to

TRDGRAi (TRDGRBi) register

Complementary PWM

mode

• Compare match with TRD0 register

and TRDGRA0 register

• TRD1 register underflow

Transfer content in buffer register to

registers TRDGRB0, TRDGRA1, and

TRDGRB1

PWM3 mode

Compare match with TRD0 register

and TRDGRA0 register

Transfer content in buffer register to

registers TRDGRA0, TRDGRB0,

TRDGRA1, and TRDGRB1

Transfer

TRDGRAi register

n-1

n+1

TRDIOAi input

TRDi register

i = 0 or 1

The above applies under the following conditions:

• The BFCi bit in the TRDMR register is set to 1 (the TRDGRCi register is used as the buffer register of

the TRDGRAi register).

• Bits IOA2 to IOA0 in the TRDIORAi register are set to 100b (input capture at the falling edge).

Transfer

TRDGRCi register

(buffer)

TRDGRCi register

(buffer)

TRDGRAi

TRDi

TRDIOAi input

(input capture signal)

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