R8C2E datasheet(45/354 Pages) RENESAS

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R8C/2E Group, R8C/2F Group

5. Resets

Rev.1.00

Dec 14, 2007

Page 29 of 332

REJ09B0349-0100

5.2

Power-On Reset Function

When the RESET pin is connected to the VCC pin via a pull-up resistor, and the VCC pin voltage level rises while

the rise gradient is trth or more, the power-on reset function is enabled and the MCU resets its pins, CPU, and SFR.

When a capacitor is connected to the RESET pin, too, always keep the voltage to the RESET pin 0.8VCC or more.

When the input voltage to the VCC pin reaches the maximum 2.6 V or above, the low-speed on-chip oscillator

clock starts counting. When the low-speed on-chip oscillator clock count reaches 32, the internal reset signal is held

“H” and the MCU enters the reset sequence (refer to Figure 5.3). The low-speed on-chip oscillator clock divided by

8 is automatically selected as the CPU clock after reset.

Refer to 4. Special Function Registers (SFRs) for the states of the SFR after power-on reset.

Figure 5.7 shows an Example of Power-On Reset Circuit and Operation.

Figure 5.7

Example of Power-On Reset Circuit and Operation

RESET

VCC

4.7 k

Ω

(reference)

NOTES:

1. Ensure that the voltage is 2.2 V or above during the sampling time.

2. The sampling time is fOCO-S divided by 1

× 4 cycles.

3. Refer to 21. Electrical Characteristics.

max. 2.6 V

Vpor1

Internal

reset signal

(“L” valid)

tw(por1)

Sampling time(1, 2)

max. 2.6 V

fOCO-S

× 32

fOCO-S

× 32

Vpor2

2.2 V

External

Power VCC

trth

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