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M66290AFP bảng dữ liệu(PDF) 47 Page - Renesas Technology Corp |
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M66290AFP bảng dữ liệu(HTML) 47 Page - Renesas Technology Corp |
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47 / 54 page ![]() USB DEVICE CONTROLLER M66290AGP/FP MITSUBISHI <DIGITAL ASSP> 46 D15 to 0 Dreq tsu(D) tw(CTRL) th(D) twh(Dreq) td(Dack-Dreq) D15 to 0 ten(CTRL) tw(CTRL) tdis(CTRL) tv(CTRL) ta(CTRL) RD WR (3) DMA Transfer Timing -1 (3-2) Read timing -1 Dack Dreq twh(Dreq) td(Dack-Dreq) Dack trec(CTRL) trec(CTRL) td(CTRL-Dreq) td(CTRL-Dreq) Data output is established Data input is established (note 4) (note 6) (note 4) (note 5) note 4 : Inactive condition of Dreq is Dack="L" And when next DMA transfer exists, spec when Dreq turns to active is valid the latest one of twh(Dreq) or td(CTRL-Dreq). note 5 : Write is done in the overlap period when Dack and WR is active "L". Spec from the positive edge is valid from the fastest inactive signal. Spec of pulse width is valid of the overlap period of active "L". note 6 : Read is done in the overlap period of Dack and RD is active "L" Spec from the negative edge is valid from the latest signal. Spec from the positive edge is valid form the fastest inactive signal. Spec of pulse width is valid during active "L" overlap period. In case of Full speed transfer mode (DMA operation mode register : MODE=0) (3-1) Write timing -1 |
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