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M35054 bảng dữ liệu(PDF) 16 Page - Renesas Technology Corp |
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M35054 bảng dữ liệu(HTML) 16 Page - Renesas Technology Corp |
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16 / 41 page ![]() M35054-XXXFP/M35055-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS MITSUBISHI MICROCOMPUTERS 15 Status 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Register BLK0 BLK1 EX SCOR STOPIN STOP1 DSPON RAMERS TEST47 TEST48 TEST49 TEST50 TEST51 LEVEL1 Contents DA 0~D 0 1 2 3 4 5 6 7 8 9 A B C D Function External synchronization Internal synchronization Superimpose monotone display Superimpose coloring display (only NTSC) fSC input mode Can not be used. Oscillation VCO for display Stop oscillation VCO for display Display OFF Display ON RAM not erased RAM erased Can not be used. It should be fixed to “1”. Can not be used. It should be fixed to “1”. Can not be used. It should be fixed to “1”. Can not be used. It should be fixed to “1”. Can not be used. It should be fixed to “1”. Internal bias OFF Internal bias ON DSPn= “0” Matrix-outline size Character size Border size Matrix-outline size BLK1 0 0 1 1 BLK0 0 1 0 1 DSPn= “1” Matrix-outline border size (9) Address F816 Remarks Display mode (BLNK output) variable Synchronizing signal switching (Note1) “1” setting is forbidden at internal synchronous or PAL, M-PAL mode displaying. OSCIN oscillation control Control oscillation VCO for display This register does not exist (Note 3). Notes 1. In dealing with the internal synchronization, cut off external video signals outside the IC. The leakage of external input video signals can be avoided. Notes 2. In displaying color superimposition, enter into the OSCIN pin the fSC signal that phase-synchronizes with the color burst of the composite video signals (input to the CVIN pin). Notes 3. Erases all the display RAM. The character code turns to blank-FF16, the encode data bit and the blinking bit turn to “1” respectively, and reversed character bit turns to “0”. Border size Matrix-outline size Character size Generates bias potential for syn- chronous separation. |
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