VV6501 datasheet(18/44 Pages) STMICROELECTRONICS

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STV0681 Hardware Interfaces

STV0681

18/44

ADCS 7283313C

STV0681 Hardware Interfaces

4.1

Sensor interface

STV0681 uses a standard ST digital interface from the sensor, and the sensor clock input is

provided by an output from STV0681. The design of a camera using this chipset should be

implemented as closely as possible to the reference design (

Chapter 7), in which case the chipset

can be regarded as a functional ‘black box’, and no further details regarding the STV0681-sensor

interface are required.

4.2

Memory interface

STV0681 is designed to interface to an external 16Mbit or 64Mbit SDRAM (see

Table 1). The

SDRAM device must have a 16 bit wide data bus and operate from a 3.3V supply. Two sizes of

SDRAM memory are supported by STV0681, 16MBits (1M x 16 bits wide) or 64MBits (4M x 16 bits

wide), the memory size is auto-detected by STV0681. STV0681 clocks the SDRAM at 6MHz,

typically this is well below the figures offered by most manufacturers’ devices.

4.2.1

SDRAM current consumption

For maximum system battery life while no pictures are being taken, and to meet requirements for

USB compliance, an SDRAM should be chosen with the lowest possible self refresh current

specification.

In addition, the USB suspend mode current specification requires that the camera consumes less

than 300

µA when un-tethered. Meeting this specification, which is included in the requirements for

USB compliance, assumes an SDRAM with up to approximately 250

µA self-refresh current, based

on a current consumption of approximately 50

µA for STV0681 + support circuit.

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