STV0681 datasheet(38/44 Pages) STMICROELECTRONICS

38 / 44 page

STV0681 pin description

STV0681

38/44

ADCS 7283313C

AD13

Output

SDRAM address A13, BA1 for 64M SDRAM, unused

on 16M

2mA

(SL)

Output, active low

Chip select: enables (registered LOW) and disables

(registered HIGH) the SDRAM command decoder.

2mA

(SL)

RAS

Output, active low

SDRAM row address strobe command

2mA

(SL)

CAS

Output, active low

SDRAM column address strobe command

2mA

(SL)

Output, active low

SDRAM write enable command

2mA

(SL)

DQML

Output

Data input/output mask for dram_DQ[7:0]

2mA

(SL)

100

DQ0

Input/Output

SDRAM Data Bus

2mA

(SL)

DQ1

Input/Output

SDRAM Data Bus

2mA

(SL)

DQ2

Input/Output

SDRAM Data Bus

2mA

(SL)

DQ3

Input/Output

SDRAM Data Bus

2mA

(SL)

DQ4

Input/Output

SDRAM Data Bus

2mA

(SL)

DQ5

Input/Output

SDRAM Data Bus

2mA

(SL)

DQ6

Input/Output

SDRAM Data Bus

2mA

(SL)

DQ7

Input/Output

SDRAM Data Bus

2mA

(SL)

DQ8

Input/Output

SDRAM Data bus

2mA

(SL)

DQ9

Input/Output

SDRAM Data bus

2mA

(SL)

DQ10

Input/Output

SDRAM Data bus

2mA

(SL)

DQ11

Input/Output

SDRAM Data Bus

2mA

(SL)

DQ12

Input/Output

SDRAM Data Bus

2mA

(SL)

DQ13

Input/Output

SDRAM Data Bus

2mA

(SL)

DQ14

Input/Output

SDRAM Data Bus

2mA

(SL)

DQ15

Input/Output

SDRAM Data Bus

2mA

(SL)

Table 15: STV0681 pin listing

Pin no.

Signal

Type

Description

drive

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