HM62V8100LBPI-5SL datasheet(13/21 Pages) RENESAS

13 / 21 page

HM62V8100I Series

Write Cycle

HM62V8100I

-5

Parameter

Symbol

Min

Max

Unit

Notes

Write cycle time

—

Address valid to end of write

—

Chip selection to end of write

—

Write pulse width

—

Address setup time

—

Write recovery time

—

Data to write time overlap

—

Data hold from write time

0—

Output active from end of write

—

Output disable to output in High-Z

OHZ

1, 2

Write to output in high-Z

WHZ

1, 2

Notes: 1. t

CHZ, tOHZ and t WHZ are defined as the time at which the outputs achieve the open circuit conditions

and are not referred to output voltage levels.

2. This parameter is sampled and not 100% tested.

3. At any given temperature and voltage condition, t

HZ max is less than tLZ min both for a given device

and from device to device.

4. A write occures during the overlap of a low

CS1, a high CS2, a low WE. A write begins at the latest

transition among

CS1 going low, CS2 going high, WE going low. A write ends at the earliest

transition among

CS1 going high, CS2 going low, WE going high. t

WP is measured from the

beginning of write to the end of write.

5. t

CW is measured from the later of CS1 going low or CS2 going high to the end of write.

6. t

AS is measured from the address valid to the beginning of write.

7. t

WR is measured from the earliest of CS1 or WE going high or CS2 going low to the end of write

cycle.

HM62V8100LBPI-5SL bảng dữ liệu(PDF) 13 Page - Renesas Technology Corp

HM62V8100LBPI-5SL bảng dữ liệu(HTML) 13 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

bảng dữ liệu tải về

Link URL