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M38266EBFS bảng dữ liệu(PDF) 18 Page - Renesas Technology Corp |
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M38266EBFS bảng dữ liệu(HTML) 18 Page - Renesas Technology Corp |
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18 / 91 page ![]() Rev.1.00 Sep 06, 2006 page 18 of 88 REJ03B0181-0100 3826 Group (One Time PROM version) Fig. 14 Port block diagram (1) (5) Port P44 (4) Ports P16, P17, P2, P41, P42 Pull-up control VL1/VSS VL2/VL3/VCC VL1/VSS VL2/VL3/VCC VL1/VSS VL2/VL3/VCC (1) Ports P01–P07, P11–P15 Data bus Port latch Interface logic level shift circuit Pull-up Port Segment Segment/Port LCD drive timing Segment output enable bit Segment data Port direction register Port direction register (2) Ports P00, P10 Data bus Port latch Interface logic level shift circuit Port Segment Segment/Port LCD drive timing Segment data Port direction register Direction register Pull-up Data bus Port latch Interface logic level shift circuit Port Segment Segment/Port LCD drive timing Segment data Port P3 output control bit Pull-up (3) Port P3 Data bus Port latch Direction register Key input interrupt input INT1, INT2 interrupt input Except P16, P17 Pull-up control Data bus Port latch Direction register Serial I/O1 enable bit Serial I/O1 input Receive enable bit Segment output enable bit Segment output enable bit Port P3 output control bit |
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