| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
M38262EBFS bảng dữ liệu(PDF) 35 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
M38262EBFS bảng dữ liệu(HTML) 35 Page - Renesas Technology Corp |
|
35 / 91 page ![]() Rev.1.00 Sep 06, 2006 page 35 of 88 REJ03B0181-0100 3826 Group (One Time PROM version) Fig. 33 Timing of serial I/O2 function D7 D0 D1 D2 D3 D4 D5 D6 Synchronous clock (Note 1) Serial I/O2 output SOUT2 Serial I/O2 input SIN2 Serial I/O2 register write signal (Notes 2, 3) Serial I/O2 interrupt request bit = “1” 1: When the internal clock is selected as the synchronous clock, the divide ratio can be selected by setting bits 0 to 2 of the serial I/O2 control register. 2: When the internal clock is selected as the synchronous clock, the SOUT2 pin goes to high impedance after transfer completion. 3: When the external clock is selected as the synchronous clock, the SOUT2 pin keeps D7 output level after transfer completion. However, if synchronous clocks input are carried on, the transmit data will be output continuously from the SOUT2 pin because shifts of serial I/O2 shift register is continued as long as synchronous clocks are input. Notes ●Serial I/O2 Operating The serial I/O2 counter is initialized to “7” by writing to the serial I/O2 register. After writing, whenever a synchronous clock changes from “H” to “L”, data is output from the SOUT2 pin. Moreover, whenever a syn- chronous clock changes from “L” to “H”, data is taken in from the SIN2 pin, and 1 bit shift of the serial I/O2 register is carried out si- multaneously. When the internal clock is selected as a synchronous clock, it is as follows if a synchronous clock is counted 8 times. •Serial I/O2 counter = “0” •Synchronous clock stops in “H” state •Serial I/O2 interrupt request bit = “1” The SOUT2 pin is in a high impedance state after transfer is com- pleted. When the external clock is selected as a synchronous clock, if a synchronous clock is counted 8 times, the serial I/O2 interrupt re- quest bit is set to “1”, and the SOUT2 pin holds the output level of D7. However, if a synchronous clock continues being input, the shift of the serial I/O2 register is continued and transmission data continues being output from the SOUT2 pin. |
|
Link URL |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Liên kết đến bảng dữ liệu | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |