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M3826AE6FS bảng dữ liệu(PDF) 34 Page - Renesas Technology Corp |
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M3826AE6FS bảng dữ liệu(HTML) 34 Page - Renesas Technology Corp |
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34 / 91 page ![]() Rev.1.00 Sep 06, 2006 page 34 of 88 REJ03B0181-0100 3826 Group (One Time PROM version) Serial I/O2 Serial I/O2 can be used only for clock synchronous serial I/O. For serial I/O2, the transmitter and the receiver must use the same clock as a synchronous clock. When an internal clock is se- lected as a synchronous clock, the serial I/O2 is initialized and, transmit and receive is started by a write signal to the serial I/O2 register. When an external clock is selected as an synchronous clock, the serial I/O2 counter is initialized by a write signal to the serial I/O2 register, serial I/O2 becomes the state where transmission or re- ception can be performed. Write to the serial I/O2 register while SCLK21 is “H” state when an external clock is selected as an syn- chronous clock. Either P62/SCLK21 or P63/SCLK22 pin can be selected as an output pin of the synchronous clock. In this case, the pin that is not se- lected as an output pin of the synchronous clock functions as a I/ O port. [Serial I/O2 Control Register (SIO2CON)] 001D16 The serial I/O2 control register contains eight control bits for the serial I/O2 functions. After setting to this register, write data to the serial I/O2 register and start transmit and receive. Fig. 31 Structure of serial I/O2 control register Fig. 32 Block diagram of serial I/O2 function Serial I/O2 control register (SIO2CON : address 001D16) b7 Internal synchronous clock select bits 0 0 0: f(XIN)/8 0 0 1: f(XIN)/16 0 1 0: f(XIN)/32 0 1 1: f(XIN)/64 1 0 0: 1 0 1: 1 1 0: f(XIN)/128 1 1 1: f(XIN)/256 Serial I/O2 port selection bit 0: I/O port 1: SOUT2,SCLK21/SCLK22 signal output P61/SOUT2 P-channel output disable bit 0: CMOS output (in output mode) 1: N-channel open-drain output (in output mode) Transfer direction selection bit 0: LSB first 1: MSB first Serial I/O2 synchronous clock selection bit 0: External clock 1: Internal clock Synchronous clock output pin selection bit 0: SCLK21 1: SCLK22 b0 b2 b1 b0 Do not select XIN “1” “0” “0” “1” “0” “1” (Note) 1/8 1/16 1/32 1/64 1/128 1/256 Data bus Serial I/O2 interrupt request Serial I/O2 port selection bit Serial I/O2 counter (3) Serial I/O 2 register (8) Synchronous circuit Serial I/O2 synchronous clock selection bit External clock Internal synchronous clock select bits P63 latch P63/SCLK22 P62/SCLK21 P61/SOUT2 P60/SIN2 P62 latch P61 latch (Note) Note: It is selected by the serial I/O2 synchronous clock selection bit, the synchronous clock output pin selection bit, and the serial I/O2 port selection bit. |
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