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STS8DNF3LL bảng dữ liệu(PDF) 1 Page - STMicroelectronics |
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STS8DNF3LL bảng dữ liệu(HTML) 1 Page - STMicroelectronics |
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1 / 8 page ![]() 1/8 October 2002 . STS8DNF3LL DUAL N-CHANNEL 30V - 0.017 Ω - 8A SO-8 LOW GATE CHARGE STripFET™ II POWER MOSFET s TYPICAL RDS(on) = 0.017Ω s OPTIMAL RDS(on) x Qg TRADE-OFF @ 4.5V s CONDUCTION LOSSES REDUCED s SWITCHING LOSSES REDUCED DESCRIPTION This application specific Power MOSFET is the second generation of STMicroelectronis unique "Single Feature Size™" strip-based process. The resulting transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance. APPLICATIONS s SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY CPU CORE DC/DC CONVERTERS FOR MOBILE PCS TYPE VDSS RDS(on) ID STS8DNF3LL 30 V <0.020 Ω 8 A SO-8 ABSOLUTE MAXIMUM RATINGS ( •) Pulse width limited by safe operating area. Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 30 V VDGR Drain-gate Voltage (RGS = 20 kΩ) 30 V VGS Gate- source Voltage ± 16 V ID Drain Current (continuous) at TC = 25°C Single Operation 8 A Drain Current (continuous) at TC = 100°C Single Operation 5 IDM(•) Drain Current (pulsed) 32 A Ptot Total Dissipation at TC = 25°C Dual operating Total Dissipation at TC = 25°C Single operating 2 1.6 W W INTERNAL SCHEMATIC DIAGRAM |
Số phần tương tự - STS8DNF3LL |
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Mô tả tương tự - STS8DNF3LL |
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