M38265EBFP datasheet(79/91 Pages) RENESAS

79 / 91 page

Rev.1.00

Sep 06, 2006

page 79 of 88

REJ03B0181-0100

3826 Group (One Time PROM version)

3.3.6 Notes on serial I/O1

(1)

Writing to baud rate generator (BRG)

Write data to BRG while the transmission and reception operations are stopped.

(2)

Setting procedure when using serial I/O1 transmit interrupt

When the serial I/O1 transmit interrupt is used, take the following sequence.

➀Set the serial I/O1 transmit interrupt enable bit (bit 3 of interrupt control register 1 (address 3E16))

to “0” (disabled).

➁Set the transmit enable bit (bit 4 of serial I/O1 control register (address 1A16)) to “1”.

➂Set the serial I/O1 transmit interrupt request bit (bit 3 of interrupt request register 1 (address

3C16)) to “0” (no interrupt request issued) after 1 or more instruction has executed.

➃Set the serial I/O1 transmit interrupt enable bit to “1” (enabled).

When the transmission enable bit is set to “1”, the transmit buffer empty flag (bit 0 of serial I/O1

status register (address 1916)) and the transmit shift register completion flag (bit 2 of serial I/O1

status register) are set to “1”.

Therefore, the serial I/O1 transmit interrupt request bit is set to “1” regardless of the state of the

transmit interrupt source selection bit (bit 3 of serial I/O1 control register).

(3)

Data transmission control with referring to transmit shift register completion flag

After the transmit data is written to the transmit buffer register (address 1816), the transmit shift

transmission is controlled with referring to the flag after writing the data to the transmit buffer

(4)

Setting serial I/O1 control register again

Set the serial I/O1 control register again after the transmission and the reception circuits are reset

by setting both the transmit enable bit and the receive enable bit to “0”.

Fig. 3.3.7 Sequence of setting serial I/O1 control register again

Set both the transmit enable bit

(TE) and the receive enable bit

(RE) to “0”

↓

Set the bits 0 to 3 and bit 6 of the

serial I/O1 control register

↓

Set both the transmit enable bit

(TE) and the receive enable bit

(RE), or one of them to “1”

Can be set with the

LDM instruction at

the same time

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