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38K2 bảng dữ liệu(PDF) 64 Page - Renesas Technology Corp |
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38K2 bảng dữ liệu(HTML) 64 Page - Renesas Technology Corp |
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64 / 151 page ![]() 38K2 Group Rev.3.00 Oct 15, 2006 page 64 of 147 REJ03B0193-0300 Fig. 96 Structure of DP1 interrupt source register (1) Downstream port 1 b7 b0 PTDIS1 PTCON1 PTERR1 PTRSM1 PTCHG1 b7:b5 0 0 0 0 0 – – – – – – – DP1 interrupt source register (DP1REQ) [address 002B16] Bit name Bit symbol At reset Function H/W S/W 00 0 Downstream port 1 disconnect detection interrupt bit Downstream port 1 connect detection interrupt bit Downstream port 1 port error interrupt bit Downstream port 1 resume interrupt bit Downstream port 1 bus-change detection interrupt bit Not used 0: No interrupt request issued 1: Interrupt request issued This bit is set to “1” when detecting a bus-disconnect state (2.5 µs or more of SE0) on a downstream port 1 in DSCONN1 = “1”. “0” can be set by software, but “1” cannot be set. 0: No interrupt request issued 1: Interrupt request issued This bit is set to “1” when detecting a bus-connect state (2.5 µs or more of J- or K- state) on a downstream port 1 in DSCONN1 = “0”. “0” can be set by software, but “1” cannot be set. 0: No interrupt request issued 1: Interrupt request issued This bit is set to “1” when an error occurs on a downstream port 1. “0” can be set by software, but “1” cannot be set. 0: No interrupt request issued 1: Interrupt request issued This bit is set to “1” when detecting a resume signal on a downstream port 1 in the condition of HUB suspended or port suspended state. “0” can be set by software, but “1” cannot be set. 0: No interrupt request issued 1: Interrupt request issued This bit is set to “1” when detecting a bus-change of a downstream port 1 in the condition of HUB suspended state. It is also “1” in the internal clock halted. “0” can be set by software, but “1” cannot be set. Write “0” when writing. “0” is read when reading. O O O O O O O O O O O O –: State remaining W R |
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