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6V7 bảng dữ liệu(PDF) 85 Page - Renesas Technology Corp |
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6V7 bảng dữ liệu(HTML) 85 Page - Renesas Technology Corp |
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85 / 298 page ![]() Rev.1.00 May 18, 2004 page 85 of 296 M306V7MG/MH/MJ/MJA-XXXFP, M306V7FG/FH/FJ/FJAFP Figure 2.10.10 Clock prescaler reset flag Timer A1 event/trigger select bit Timer A2 event/trigger select bit Timer A3 event/trigger select bit Timer A4 event/trigger select bit Symbol Address When reset TRGSR 038316 0016 Trigger select register Bit name Function Bit symbol W R b7 b6 b5 b4 b3 b2 b1 b0 b1 b0 TA3TGL TA2TGH TA2TGL TA1TGH TA1TGL TA3TGH TA4TGL TA4TGH 0 0 : Do not set 0 1 : TB2 overflow is selected 1 0 : TA0 overflow is selected 1 1 : TA2 overflow is selected b3 b2 0 0 : Do not set 0 1 : TB2 overflow is selected 1 0 : TA1 overflow is selected 1 1 : TA3 overflow is selected b5 b4 0 0 : Do not set 0 1 : TB2 overflow is selected 1 0 : TA2 overflow is selected 1 1 : TA4 overflow is selected b7 b6 0 0 : Do not set 0 1 : TB2 overflow is selected 1 0 : TA3 overflow is selected 1 1 : TA0 overflow is selected Symbol Address When reset CPSRF 038116 0XXXXXXX2 Clock prescaler reset flag Bit name Function Bit symbol b7 b6 b5 b4 b3 b2 b1 b0 Clock prescaler reset flag 0 : No effect 1 : Prescaler is reset (When read, the value is “0”) CPSR W R Nothing is assigned. In an attempt to write to these bits, write “0.” The value, if read, turns out to be indeterminate. Figure 2.10.9 Trigger select register |
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