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HD74LVC138FPEL bảng dữ liệu(PDF) 1 Page - Renesas Technology Corp |
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HD74LVC138FPEL bảng dữ liệu(HTML) 1 Page - Renesas Technology Corp |
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1 / 6 page ![]() Rev.3.00 Jul. 23, 2004 page 1 of 5 HD74LVC138 3-to-8-line Decoder / Demultiplexer REJ03D0349–0300Z (Previous ADE-205-068B (Z)) Rev.3.00 Jul. 23, 2004 Description The HD74LVC138 has three binary select inputs in a 16 pin package. If the device is enabled these inputs determine which one of the eight normally high outputs will go low. Two active low and one active high enables are provided to ease the cascading of decoders. Low voltage and high-speed operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation. Features • V CC = 2.0 V to 5.5 V • All inputs V IH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) • Typical V OL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical V OH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±24 mA (@V CC = 3.0 V to 5.5 V) • Ordering Information Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) HD74LVC138FPEL SOP–16 pin (JEITA) FP–16DAV FP EL (2,000 pcs/reel) HD74LVC138TELL TSSOP–16 pin TTP–16DAV T ELL (2,000 pcs/reel) Note: Please consult the sales office for the above package availability. Function Table Inputs Enable Select Outputs G1 G2A G2B CB A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 X X HX X X HHHH HH HH X H X X X X HHHH HH HH L X X X X X HHHH HH HH HL L L L L L HHH HH HH HL L L L H HL HH HH HH HL L L HL HHL H HH HH HL L L HH HHHL HH HH HL L H L L HHHH L H HH HL L H L H HHHH HL HH HL L H HL HHHH HH L H HL L H HH HHHH HH HL H: High level L: Low level X: Immaterial |
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