ST62T52C datasheet(55/78 Pages) STMICROELECTRONICS

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ST62T52C ST62T62C/E62C

INSTRUCTION SET (Cont’d)

Conditional Branch. The branch instructions

achieve a branch in the program when the select-

ed condition is met.

Bit Manipulation Instructions. These instruc-

tions can handle any bit in data space memory.

One group either sets or clears. The other group

(see Conditional Branch) performs the bit test

branch operations.

Control Instructions. The control instructions

control the MCU operations during program exe-

cution.

Jump and Call. These two instructions are used

to perform long (12-bit) jumps or subroutines call

inside the whole program space.

Table 18. Conditional Branch Instructions

Notes

3-bit address

rr.

Data space register

5 bit signed displacement in the range -15 to +16<F128M>

∆ . Affected. The tested bit is shifted into carry.

ee.

8 bit signed displacement in the range -126 to +129

* .

Not Affected

Table 19. Bit Manipulation Instructions

Notes:

3-bit address;

* . Not<M> Affected

rr.

Data space register;

Table 20. Control Instructions

Notes:

This instruction is deactivated<N>and a WAIT is automatically executed instead of a STOP if the watchdog function is selected.

∆ . Affected

Not Affected

Table 21. Jump & Call Instructions

Notes:

abc. 12-bit address;

* .

Not Affected

Instruction

Branch If

Bytes

Cycles

Flags

JRC e

C = 1

JRNC e

C = 0

JRZ e

Z = 1

JRNZ e

Z = 0

JRR b, rr, ee

Bit = 0

∆

JRS b, rr, ee

Bit = 1

∆

Instruction

Addressing Mode

Bytes

Cycles

Flags

SET b,rr

Bit Direct

RES b,rr

Bit Direct

Instruction

Addressing Mode

Bytes

Cycles

Flags

NOP

Inherent

RET

Inherent

RETI

Inherent

∆∆

STOP (1)

Inherent

WAIT

Inherent

Instruction

Addressing Mode

Bytes

Cycles

Flags

CALL abc

Extended

JP abc

Extended

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