| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
L6756D bảng dữ liệu(PDF) 26 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
L6756D bảng dữ liệu(HTML) 26 Page - STMicroelectronics |
|
26 / 36 page ![]() Output voltage monitoring and protections L6756D 26/36 6 Output voltage monitoring and protections L6756D monitors through pin VSEN the regulated voltage in order to manage OV and UV. The device shows different thresholds when in different operative conditions but the behavior in response to a protection event is still the same as described below. 6.1 Overvoltage Once VCC crosses the turn-ON threshold and the device is enabled (EN = 1), L6756D provides an overvoltage protection by sensing the regulated voltage through VSEN: when it overcomes the programmed VID +200 mV (max) the controller: – Permanently sets Gx to zero keeping DRVON high in order to keep all the low-side MOSFETs on to protect the load. – Drives the OSC/ FLT pin high. – Power supply or EN pin cycling is required to restart operations. 6.2 Feedback disconnection This feature acts in order to stop the device from regulating dangerous voltages in case the remote sense connections are left floating. The protection is available for both the positive and negative sense. According to what reported in Figure 11, the protection works as follow: – Positive sense consider to monitor the CORE output voltage through both VSEN and CSxN. As soon as CSxN is more than 650 mV higher than VSEN, the device latches with all Gx set to HiZ and DRVON set to zero. FLT pin is driven high. In any case, the 50 μA pull-down current on the VSEN (offset) forces the device to detect the fault condition. – Negative sense consider to monitor the internal opamp used to recover the SGND losses by comparing its output and the internal reference generated by the DAC. As soon as the difference between the output and the input of this opamp is higher than 500mV, the device latches with all Gx set to HiZ and DRVON set to zero. FLT pin is driven high. – To recover from a latch condition, cycle VCC or EN. Figure 11. FB disconnection protection |
|
Link URL |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Liên kết đến bảng dữ liệu | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |