STPC4HEBI datasheet(35/93 Pages) STMICROELECTRONICS

35 / 93 page

ELECTRICAL SPECIFICATIONS

Release 1.5 - January 29, 2002

35/93

Note 1: PCI clock at 33MHz

Table 4-5. VGA RAMDAC Power Consumption

DCLK

(MHz)

DAC mode

(State)

PMax (mW)

VDD_DAC = 2.45V

VDD_DAC = 2.7V

Shutdown

6.25 - 135

Active

150

180

Table 4-6. 2.5V Power Consumptions (VCORE + VDD_x_PLL + VDD_DAC)

HCLK

(MHz)

CPUCLK

(MHz)

MCLK

(MHz)

Mode

DCLK

(MHz)

PMU

(State)

PMax (W)

V2.5V=2.45V

V2.5V=2.7V

66 (x1)

SYNC

Stopped

Stop Clock

0.6

0.9

Full Speed

1.4

1.8

135

Stop Clock

0.9

1.2

Full Speed

1.7

2.3

100

100 (x1)

100

SYNC

Stopped

Stop Clock

0.8

1.1

Full Speed

1.5

2.0

135

Stop Clock

1.5

1.9

Full Speed

2.1

2.7

133 (x2)

SYNC

Stopped

Stop Clock

0.7

0.9

Full Speed

1.7

2.1

135

Stop Clock

0.9

1.2

Full Speed

1.9

2.5

133 (x2)

100

ASYNC

Stopped

Stop Clock

0.8

1.1

Full Speed

1.6

2.1

135

Stop Clock

1.5

1.9

Full Speed

2.3

2.9

Table 4-7. 3.3V Power Consumptions (VDD)

HCLK

(MHz)

CPUCLK

(MHz)

MCLK

(MHz)

DCLK

(MHz)

PMU

(State)

PMax

(mW)

66 (x1)

6.26

Full Speed

135

160

100

100 (x1)

100

6.26

Full Speed

115

135

180

133 (x2)

6.26

Full Speed

100

135

165

133 (x2)

100

6.26

Full Speed

115

135

180

Table 4-8. PLL Power Consumptions

PLL name

PMax (mW)

VDD_PLL = 2.45V

VDD_PLL = 2.7V

VDD_DCLK_PLL

VDD_DEVCLK_PLL

VDD_HCLKI_PLL

VDD_HCLKO_PLL

VDD_MCLKI_PLL

VDD_MCLKO_PLL

VDD_PCICLK_PLL

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