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STW5095T bảng dữ liệu(PDF) 39 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  Low-power asynchronous stereo audio Codec with integrated power amplifiers
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STW5095T bảng dữ liệu(HTML) 39 Page - STMicroelectronics

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Control registers
STw5095
38/72
5.8
Digital filters, software reset and master clock control
5.9
Interrupt control and control interface SPI out mode
CR#
(hex)
Description
D7D6D5D4
D3
D2D1
D0
Def.
CR29 (1Dh)
Digital Filters Control
X
DAVOICE
DA96K
RXNH
ADVOICE
AD96K
ADNH
TXNH
0000 0000
CR30 (1Eh)
Soft Reset & AMCK Range
SWRES
X
X
X
AMCKSIN
CKRANGE(2:0)
0000 0000
Bits
Name
Value
CR29 Description
Def.
6DAVOICE
1
0
DA path Voice RX filter is enabled (single channel, left used)
DA path Audio filters are enabled
0
5DA96K
1
0
DA path data rate is in the range 88 kHz to 96 kHz
DA path data rate is in the range 8 kHz to 48 kHz
0
4RXNH
1
0
DA path High pass Voice RX filter is disabled
DA path High pass Voice RX filter is enabled (300Hz @ 8kHz rate)
0
3ADVOICE
1
0
AD path Voice TX filter is enabled (single channel, left used)
AD path Audio filters are enabled
0
2AD96K
1
0
AD path data rate is in the range 88 kHz to 96 kHz
AD path data rate is in the range 8 kHz to 48 kHz
0
1
ADNH
1
0
AD path Audio DC filter is disabled
AD path Audio DC filter is enabled
0
0TXNH
1
0
AD path High pass Voice TX filter is disabled
AD path High pass Voice TX filter is enabled (300Hz @ 8kHz rate)
0
Bits
Name
Value
CR30 Description
Def.
7SWRES
1
0
Software reset: All registers content is reset to the default value
Control Register content is left unchanged
0
3
AMCKSIN
1
0
Signal at AMCK pin is a sinusoid
Signal at AMCK pin is a square wave
0
2-0
CKRANGE(2:0)
000
001
010
011
100
101
000
CR#
(hex)
Description
D7D6D5D4
D3
D2D1
D0
Def.
CR31 (1Fh)
interrupt Mask
VLSHEN
PUSHBEN
HSDETEN
VLSHMSK
PUSHBMSK
HSDETMSK
OVFMSK
PORMSK
0000 0000
AMCK range
MCKCOEFF
4.0
MHz to6.0MHz
8.0
6.0
MHz to8.0MHz
6.0
8.0
MHz to12.0MHz
4.0
12.0 MHz to16.0MHz
3.0
16.0 MHz to24.0MHz
2.0
24.0 MHz to32.0MHz
1.5



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