A5973AD

Functional description

9/19

4.3

Oscillator and synchronizator

Figure 5 shows the block diagram of the oscillator circuit.

The clock generator provides the switching frequency of the device that is internally fixed at

500 kHz. The frequency shifter block acts reducing the switching frequency in case of strong

overcurrent or short circuit. The clock signal is then used in the internal logic circuitry and is

the input of the Ramp generator and synchronizator blocks.

The ramp generator circuit provides the sawtooth signal, used to realize the PWM control

and the internal voltage feed forward, while the Synchronizator circuit generates the

synchronization signal. Infact the device has a synchronization pin that can works both as

master and slave.

As master to synchronize external devices to the internal switching frequency.

As slave to synchronize itself by external signal.

In particular, connecting together two devices, the one with the lower switching frequency

works as slave and the other one works as master.

To synchronize the device, the SYNC pin has to pass from a low level to a level higher than

the synchronization threshold with a duty cycle that can vary approximately from 10 % to

90 %, depending also on the signal frequency and amplitude.

The frequency of the synchronization signal must be at least higher than the internal

switching frequency of the device (500 kHz).

Figure 5.

Oscillator circuit