Block description

STOTG04ES

20/26

Start condition is identified by a falling edge of the SDA signal while the SCL is stable at high level. The

start condition must precede any data transfer on the bus.

Stop condition is identified by a rising edge of the SDA signal while the SCL is stable at high level. The

stop condition terminates any communication between device and master.

The acknowledge bit is used to indicate a successful byte transfer. The bus transmitter releases the SDA

line after sending eight data bits. During the ninth clock period the receiver pulls the SDA line low to

acknowledge the receipt of the eight data bits. If the receiver is a slave device and it does not generate

acknowledge bit then the bus master can generate the stop condition in order to abort the transfer.

word consists of eight bits with most significant bit first and least significant bit last.

Symbols used in the tables are:

• S – start condition

• P – stop condition

• A – acknowledge bit

• N – negative acknowledge

WRITE Command to the transceiver device is described by following table. It is possible to write into

several consecutive registers during one write command.

READ command consists of dummy write to set proper address of a register followed by real read

sequence.

S

Device address

0

A

Reg. address K

A

Data (K)

A

Data (K+1)

A

..

Data (K+N)

A

P

S

Device address

0

A

Reg. address K

A

P

S

Device address

1

A

Data (K)

A

Data (K+1)

A

Data (K+2)

A

...

Data (K+N)

N

P