T84C5112-RKSCL datasheet(21/97 Pages) ATMEL

21 / 97 page

Rev. B - November 10, 2000

Preliminary

T80C5112

Table 8. WDTPRG Register

WDTPRG Address (0A7h)

Reset value XXX0 0000

Write only register

8.1.1. WDT during Power Down and Idle

8.1.1.1. Power down and OSCC inactive

In Power Down mode the oscillator stops, which means the WDT also stops. While in Power Down mode the

user does not need to service the WDT. There are 2 methods of exiting Power Down mode: by a hardware reset

or via a level activated external interrupt which is enabled prior to entering Power Down mode. When Power

Down is exited with hardware reset, servicing the WDT should occur as it normally should whenever the T80C5112

is reset. Exiting Power Down with an interrupt is significantly different. The interrupt is held low long enough for

the oscillator to stabilize. When the interrupt is brought high, the interrupt is serviced. To prevent the WDT from

resetting the device while the interrupt pin is held low, the WDT is not started until the interrupt is pulled high.

It is suggested that the WDT be reseted during the interrupt service routine.

To ensure that the WDT does not overflow within a few states of exiting of powerdown, it is best to reset the

WDT just before entering powerdown.

Bit Number

Bit

Mnemonic

Description

Reserved

Do not try to set this bit.

WDT overßow select bit

0 : Overßow after 14 bits

1 : Overßow after 10 bits

WDT Time-out select bit 2

WDT Time-out select bit 1

WDT Time-out select bit 0

S2S1S0

Selected Time-out with T0=0

000

(214 - 1) machine cycles, 16.3 ms @ 12 MHz

001

(215 - 1) machine cycles, 32.7 ms @ 12 MHz

010

(216 - 1) machine cycles, 65.5 ms @ 12 MHz

011

(217 - 1) machine cycles, 131 ms @ 12 MHz

100

(218 - 1) machine cycles, 262 ms @ 12 MHz

101

(219 - 1) machine cycles, 542 ms @ 12 MHz

110

(220 - 1) machine cycles, 1.05 s @ 12 MHz

111

(221 - 1) machine cycles, 2.09 s @ 12 MHz

S2S1 S0

Selected Time-out with T0=1

000

(210 - 1) machine cycles, 60 ms @ 200 kHz

001

(211 - 1) machine cycles, 120ms @ 200 kHz

010

(212 - 1) machine cycles, 240ms @ 200 kHz

011

(213 - 1) machine cycles, 480ms @ 200 kHz

100

(214 - 1) machine cycles, 860ms @ 200 kHz

101

(215 - 1) machine cycles, 1.7s @ 200 kHz

110

(216 - 1) machine cycles, 3.4s @ 200 kHz

111

(217 - 1) machine cycles, 6.8s @ 200 kHz

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