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T89C51AC2-RLSI-M bảng dữ liệu(PDF) 89 Page - ATMEL Corporation

tên linh kiện T89C51AC2-RLSI-M
Giải thích chi tiết về linh kiện  8-bit MCU with 32K bytes Flash, 10 bits A/D and EEPROM
PDF  117 Pages
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nhà sản xuất  ATMEL [ATMEL Corporation]
Trang chủ  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

T89C51AC2-RLSI-M bảng dữ liệu(HTML) 89 Page - ATMEL Corporation

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Draft.A - March 30, 2001
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T89C51AC2
16.4. ADC Converter Operation
A start of single A/D conversion is triggered by setting bit ADSST (ADCON.3).
The busy flag ADSST(ADCON.3) is automatically set when an A/D conversion is running. After completion of
the A/D conversion, it is cleared by hardware. This flag can be read only, a write has no effect.
The end-of-conversion flag ADEOC (ADCON.4) is set when the value of conversion is available in ADDH and
ADDL, it is cleared by software. If the bit EADC (IEN1.1) is set, an interrupt occur when flag ADEOC is set
(see Figure 80). Clear this flag for re-arming the interrupt.
The bits SCH0 to SCH2 in ADCON register are used for the analog input channel selection.
Before Starting Power reduction modes the ADC conversion has to be completed.
Table 21. Selected Analog input
16.5. Voltage Conversion
When the ADCIN is equals to VAREF the ADC converts the signal to 3FFh (full scale). If the input voltage
equals VAGND, the ADC converts it to 000h. Input voltage between VAREF and VAGND are a straight-line
linear conversion. All other voltages will result in 3FFh if greater than VAREF and 000h if less than VAGND.
Note that ADCIN should not exceed VAREF absolute maximum range!
SCH2
SCH1
SCH0
Selected Analog input
0
0
0
AN0
0
0
1
AN1
0
1
0
AN2
0
1
1
AN3
1
0
0
AN4
1
0
1
AN5
1
1
0
AN6
1
1
1
AN7



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