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STD35NF3LL bảng dữ liệu(PDF) 1 Page - STMicroelectronics |
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STD35NF3LL bảng dữ liệu(HTML) 1 Page - STMicroelectronics |
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1 / 10 page ![]() 1/10 February 2002 . STD35NF3LL STD35NF3LL-1 N-CHANNEL 30V - 0.014 Ω - 35A IPAK/DPAK STripFET™ II POWER MOSFET s TYPICAL RDS(on) = 0.016 Ω @ 4.5V s OPTIMAL RDS(on) x Qg TRADE-OFF @ 4.5V s CONDUCTION LOSSES REDUCED s SWITCHING LOSSES REDUCED s LOW THRESHOLD DRIVE s THROUGH-HOLE IPAK (TO-251) POWER PACKAGE IN TUBE (SUFFIX “-1") s SURFACE-MOUNTING DPAK (TO-252) POWER PACKAGE IN TAPE & REEL (SUFFIX “T4") DESCRIPTION This application specific Power MOSFET is the third genaration of STMicroelectronis unique "Single Feature Size™" strip-based process. The resulting transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance. APPLICATIONS s SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY DC/DC CONVERTERS TYPE VDSS RDS(on) ID STD35NF3LL STD35NF3LL-1 30 V 30 V < 0.0195 Ω < 0.0195 Ω 35 A 35 A 3 2 1 1 3 IPAK TO-251 (Suffix “-1”) DPAK TO-252 (Suffix “T4”) ABSOLUTE MAXIMUM RATINGS ( •) Pulse width limited by safe operating area. (1) Starting Tj = 25 oC, ID = 17.5 A, VDD= 24 V Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 30 V VDGR Drain-gate Voltage (RGS = 20 kΩ) 30 V VGS Gate- source Voltage ± 16 V ID Drain Current (continuos) at TC = 25°C 35 A ID Drain Current (continuos) at TC = 100°C 25 A IDM(•) Drain Current (pulsed) 140 A Ptot Total Dissipation at TC = 25°C 50 W Derating Factor 0.33 W/°C EAS (1) Single Pulse Avalanche Energy 300 mJ Tstg Storage Temperature -55 to 175 °C Tj Max. Operating Junction Temperature INTERNAL SCHEMATIC DIAGRAM |
Số phần tương tự - STD35NF3LL |
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Mô tả tương tự - STD35NF3LL |
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