AT89C51ID2-RDTIM datasheet(121/159 Pages) ATMEL

121 / 159 page

121

AT89C51ID2

4289A–8051–09/03

Table 92. Program Lock bits of the SSB

Note:

U: unprogrammed or "one" level.

P: programmed or "zero" level.

X: do not care

WARNING: Security level 2 and 3 should only be programmed after Flash and code

verification.

Flash Memory Status

AT89C51ID2 parts are delivered in standard with the ISP rom bootloader.

After ISP or parallel programming, the possible contents of the Flash memory are sum-

marized on the figure below:

Figure 46. Flash memory possible contents

Memory Organization

When the EA pin high, the processor fetches instructions from internal program Flash. .

If the EA pin is tied low, all program memory fetches are from external memory.

Program Lock Bits

Protection description

Security

level

LB0

LB1

No program lock features enabled.

ISP programming of the Flash is disabled.

Same as 2, also verify through ISP programming interface is disabled.

0000h

Virgin

Default

After ISP

After parallel

programming

After parallel

programming

After parallel

programming

Application

Virgin

After ISP

Dedicated

ISP

Dedicated

ISP

application

Virgin

application

Virgin

application

FFFFh

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