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ADP121 bảng dữ liệu(PDF) 12 Page - Analog Devices

tên linh kiện ADP121
Giải thích chi tiết về linh kiện  150 mA, Low Quiescent Current, CMOS Linear Regulator
PDF  20 Pages
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ADP121 bảng dữ liệu(HTML) 12 Page - Analog Devices

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ADP121
Rev. 0 | Page 12 of 20
APPLICATIONS INFORMATION
CAPACITOR SELECTION
Output Capacitor
The ADP121 is designed for operation with small, space-saving
ceramic capacitors, but functions with most commonly used
capacitors as long as care is taken with the effective series resistance
(ESR) value. The ESR of the output capacitor affects stability of the
LDO control loop. A minimum of 0.70 μF capacitance with an
ESR of 1 Ω or less is recommended to ensure stability of the
ADP121. The transient response to changes in load current is
also affected by output capacitance. Using a larger value of output
capacitance improves the transient response of the ADP121 to
large changes in the load current. Figure 28 and Figure 29 show
the transient responses for output capacitance values of 1 μF and
4.7 μF, respectively.
CH1 MEAN
115.7mA
(400ns/DIV)
ILOAD
VOUT
VOUT = 1.8V,
CIN = COUT = 1µF
1mA TO 150mA LOAD STEP,
2.5A/µs
Figure 28. Output Transient Response, COUT = 1 μF
(400ns/DIV)
ILOAD
VOUT
VOUT = 1.8V,
CIN = COUT = 4.7µF
1mA TO 150mA LOAD STEP,
2.5A/µs
Figure 29. Output Transient Response, COUT = 4.7 μF
Input Bypass Capacitor
Connecting a 1 μF capacitor from VIN to GND reduces the
circuit sensitivity to the printed circuit board (PCB) layout,
especially when long input traces or high source impedance
is encountered. If output capacitance greater than 1 μF is
required, the input capacitor should be increased to match it.
Input and Output Capacitor Properties
Any good quality ceramic capacitor can be used with the
ADP121, as long as it meets the minimum capacitance and
maximum ESR requirements. Ceramic capacitors are manufac-
tured with a variety of dielectrics, each with a different behavior
over temperature and applied voltage. Capacitors must have an
adequate dielectric to ensure the minimum capacitance over
the necessary temperature range and dc bias conditions. X5R
or X7R dielectrics with a voltage rating of 6.3 V or 10 V are
recommended. Y5V and Z5U dielectrics are not recommended,
due to their poor temperature and dc bias characteristics.
Figure 30 depicts the capacitance vs. voltage bias characteristic
of an 0402 1 μF, 10 V, X5R capacitor. The voltage stability of a
capacitor is strongly influenced by the capacitor size and voltage
rating. In general, a capacitor in a larger package or higher voltage
rating exhibits better stability. The temperature variation of the
X5R dielectric is about ±15% over the −40°C to +85°C tempera-
ture range and is not a function of package or voltage rating.
1.2
1.0
0.8
0.6
0.4
0.2
0
0
2
468
VOLTAGE (V)
10
Figure 30. Capacitance vs. Voltage Bias Characteristic



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