FVXO-PC72 datasheet(6/15 Pages) FOX

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FVXO-PC72 Series

Page 6 of 15

Pin Description and Recommended Circuit

Pin #

Name

Type

Function

Control

Frequency Control by changing voltage

E / D

Logic

Enable / Disable Control of Output (0 = Disabled)

GND

Ground

Electrical Ground for VDD

Output

LVPECL Oscillator Output

Output 2

Output

Complementary LVPECL Output

VDD

Power

Power Supply Source Voltage

NOTES:

1 Includes pull-up resistor to V

DD to provide output when the pin (2)is No Connect.

2 Installation should include a 0.01µF bypass capacitor placed between V

(Pin 6)and GND (Pin 3) to minimize power supply line noise.

VDD

E / D

Output 2

GND

Output

Terminations as viewed from the Top

Enable / Disable Control

Pin # 2 (state)

Output (Pin # 4, Pin # 5)

OPEN (No Connection)

ACTIVE Output

“1” Level VIH ≥ 70% VDD

ACTIVE Output

“0” Level VIL ≤ 30% VDD

High Impedance

Soldering Reflow Profile (2 times Maximum at 260°C for 10 seconds MAX)

25°C

160°C

180°C

225°C

260°C

10 Seconds Max

within 5°C of 260°C peak

Ramp Down

Not to exceed 6°C/s

Ramp-Up

3°C/s Max

120 ± 20 Seconds

In Pre-heating Area

Above 225°C Reflow Area

50±10 Seconds

400 Seconds MAX from +25°C to 260°C peak

# 5

# 2

E / D

V -2V

GND

# 3

# 4

LVPECL OUTPUT

0.01 F

# 1

# 6

LVPECL OUTPUT2

0.01 F

VDD

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