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STB5NB60 bảng dữ liệu(PDF) 1 Page - STMicroelectronics |
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STB5NB60 bảng dữ liệu(HTML) 1 Page - STMicroelectronics |
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1 / 9 page ![]() STB5NB60 N - CHANNEL 600V - 1.8 Ω -5A- I2PAK/D2PAK PowerMESH ™ MOSFET s TYPICAL RDS(on) = 1.8 Ω s EXTREMELY HIGH dv/dt CAPABILITY s 100% AVALANCHE TESTED s VERY LOW INTRINSIC CAPACITANCES s GATE CHARGE MINIMIZED DESCRIPTION Using the latest high voltage MESH OVERLAY ™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s SWITCH MODE POWER SUPPLIES (SMPS) s DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE ® INTERNAL SCHEMATIC DIAGRAM January 2000 1 2 3 I 2PAK TO-262 (suffix ”-1”) TYPE VDSS RDS(on) ID ST B5NB60 600 V < 2.0 Ω 5A ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Un it VDS Drain-source Voltage (VGS =0) 600 V VDGR Drain- gate Volt age (RGS =20 k Ω) 600 V VGS G ate-source Voltage ± 30 V ID Drain Current (continuous) at Tc =25 oC5 A ID Drain Current (continuous) at Tc =100 oC3.1 A IDM ( •) Drain Current (pulsed) 20 A Ptot T otal Dissipation at Tc =25 oC100 W Derating Factor 0.8 W / o C dv/dt (1) Peak Diode Recovery volt age slope 4.5 V/ns Tstg Storage Temperat ure -65 to 150 o C Tj Max. Operating Junction Temperature 150 o C ( •) Pulse width limited by safe operating area ( 1)ISD ≤ 5A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS,Tj ≤ TJMAX 1 3 D 2PAK TO-263 (Suffix ”T4”) 1/9 |
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