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STB4NB50 bảng dữ liệu(PDF) 1 Page - STMicroelectronics |
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STB4NB50 bảng dữ liệu(HTML) 1 Page - STMicroelectronics |
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1 / 6 page ![]() STB4NB50 N - CHANNEL 500V - 2.5 Ω - 3.8A - D2PAK/I2PAK PowerMESH ™ MOSFET PRELIMINARY DATA s TYPICAL RDS(on) = 2.5 Ω s EXTREMELY HIGH dv/dt CAPABILITY s 100% AVALANCHE TESTED s VERY LOW INTRINSIC CAPACITANCES s GATE CHARGE MINIMIZED DESCRIPTION Using the latest high voltage MESH OVERLAY ™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s SWITCH MODE POWER SUPPLIES (SMPS) s DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE ® INTERNAL SCHEMATIC DIAGRAM October 1998 TYPE VDSS RDS(on) ID STB4NB50 500 V < 2.8 Ω 3.8 A ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 500 V VDGR Drain- gate Voltage (RGS = 20 k Ω) 500 V VGS Gate-source Voltage ± 30 V ID Drain Current (continuous) at Tc = 25 oC 3.8 A ID Drain Current (continuous) at Tc = 100 oC 2.4 A IDM( •) Drain Current (pulsed) 15.2 A Ptot Total Dissipation at Tc = 25 o C80 W Derating Factor 0.64 W/ o C dv/dt(1) Peak Diode Recovery voltage slope 4.5 V/ns Tstg Storage Temperature -65 to 150 o C Tj Max. Operating Junction Temperature 150 o C ( •) Pulse width limited by safe operating area (1) ISD ≤ 4 A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX 1 2 3 I 2PAK TO-262 (suffix "-1") 1 3 D 2PAK TO-263 (Suffix "T4") 1/8 |
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