MIC4100 datasheet(17/18 Pages) MICREL

17 / 18 page

Micrel, Inc.

MIC4100/1

March 2006

M9999-031506

The circuit is configured as a synchronous buck power

stage. The high-side MOSFET drain connects to the input

supply voltage (drain) and the source connects to the

switching node. The low-side MOSFET drain connects to

the switching node and its source is connected to ground.

The buck converter output inductor (not shown) would

connect to the switching node. The high-side drive trace,

HO, is routed on top of its return trace, HS, to minimize

loop area and parasitic inductance. The low-side drive

trace LO is routed over the ground plane which minimizes

the impedance of that current path. The decoupling

capacitors, CB and CVDD are placed to minimize etch length

between the capacitors and their respective pins. This

close placement is necessary to efficiently charge

capacitor CB when the HS node is low. All traces are

0.025” wide or greater to reduce impedance. Cin is used to

decouple the high current path through the MOSFETs.

Vdd

Vss

Cvdd

GND

(FET Source)

MIC4100

HS Node

(switching node)

Low-side FET

Vin (FET Drain)

High-side FET

CIN

GND

HO trace

Figure 12

MIC4100 bảng dữ liệu(PDF) 17 Page - Micrel Semiconductor