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ST7FLITE25F2M6 bảng dữ liệu(PDF) 44 Page - STMicroelectronics

tên linh kiện ST7FLITE25F2M6
Giải thích chi tiết về linh kiện  8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
PDF  131 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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ST7FLITE25F2M6 bảng dữ liệu(HTML) 44 Page - STMicroelectronics

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POWER SAVING MODES (Cont’d)
Figure 30. AWUFH Mode Flow-chart
Notes:
1. WDGHALT is an option bit. See option byte sec-
tion for more details.
2. Peripheral clocked with an external clock source
can still be active.
3. Only an AWUFH interrupt and some specific in-
terrupts can exit the MCU from HALT mode (such
as external interrupt). Refer to Table 5, “Interrupt
Mapping,” on page 35 for more details.
4. Before servicing an interrupt, the CC register is
pushed on the stack. The I[1:0] bits of the CC reg-
ister are set to the current software priority level of
the interrupt routine and recovered when the CC
register is popped.
5. If the PLL is enabled by option byte, it outputs
the clock after an additional delay of tSTARTUP (see
Figure 12).
RESET
INTERRUPT 3)
Y
N
N
Y
CPU
MAIN OSC
PERIPHERALS 2)
I[1:0] BITS
OFF
OFF
10
OFF
FETCH RESET VECTOR
OR SERVICE INTERRUPT
CPU
MAIN OSC
PERIPHERALS
I[1:0] BITS
ON
OFF
XX 4)
ON
CPU
MAIN OSC
PERIPHERALS
I[1:0] BITS
ON
ON
XX 4)
ON
256 OR 4096 CPU CLOCK
DELAY5)
WATCHDOG
ENABLE
DISABLE
WDGHALT 1)
0
WATCHDOG
RESET
1
CYCLE
AWU RC OSC
ON
AWU RC OSC
OFF
AWU RC OSC
OFF
HALT INSTRUCTION
(Active-Halt disabled)
(AWUCSR.AWUEN=1)
1



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