ST75C520PQFP datasheet(3/45 Pages) STMICROELECTRONICS

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AGNDT

RXA2

RXA1

AGNDR

EXTAL

XTAL

CLKOUT

HALT

RESET

SCOUT

BOS

EOS

SA0

SA1

SA2

SA3

SA4

SA5

SA6

GND

SD0

SD1

SD2

SD3

SD4

SD5

SD6

VCM

VREFP

VREFN

VDD

I - PIN DESCRIPTION

I.1 - Pin Connections

I.2 - Host Interface

The exchanges with the control processor proceed through a 64 Bytes DUAL port RAM shared between

the ST75C520 and the Host. The signals associated with this interface are :

Pin Name

Type

Description

SD0..SD7

I/O

System Data Bus. 8-bit data bus used for asynchronous exchanges between the ST75C520

and the Host through the dual port RAM. High impedance when exchanges are not active.

SA0..SA6

System Address Bus. 7-bit address bus for dual port RAM.

SDS (SRD)

System Data Strobe. Active low. Synchronizes all the exchanges. In Motorola mode initiates

the exchange, active low. In Intel mode initiates a read exchange, active low.

SR/W (SWR)

System Read/Write. In Motorola mode defines the type of exchange read/write. In Intel

mode initiates a write exchange, active low.

SCS

System Chip Select. Active low.

SDTACK

System Bus Data Acknowledge. Active low. Open drain.

SINTR

System Interrupt Request. Active low. This signal is asserted by the ST75C520 and

negated by the host. Open drain.

RESET

Reset. Active low.

RING

Ring Detect Signal. Active low.

INT/MOT

Select Intel/Motorola Interface.

ST75C520

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